RadioSonic
Signal Processing Platform.

RadioSonic is a portable, low-cost signal processing hardware platform for educational and evaluation use. The board provides a hands-on environment for working with real-time audio signals and exploring core DSP concepts: digital filtering, convolution, Fourier analysis, and wavelength-consistent "RF in slow motion" demonstrations.

Jump to specs ↓
ESP32-S3
WROOM-1-N8R8 SoC, 8MB flash + 8MB PSRAM
TLV320AIC3204
Programmable stereo audio codec
3 × 3.5 mm
Line In, Line Out, Headphone jacks
2–6 mics
Two onboard + up to 4 via codec expansion
Wi-Fi
2.4 GHz + USB 2.0 Type-C
RPi 40-pin
Raspberry Pi-compatible GPIO header

Components and capabilities.

Dual onboard microphones

Two omnidirectional microphones with a usable frequency range of 100 Hz to 10 kHz. Spaced 30 mm apart for audio beamforming experiments; this spacing corresponds to approximately one-half wavelength at about 5.7 kHz in air.

ESP32-S3-WROOM-1-N8R8 SoC module

Dual-core 32-bit Xtensa® LX7 processor with floating-point support and vector extensions suitable for real-time DSP. Integrates I²S audio interfaces, DMA controllers, timers, and high-speed serial interfaces for time- and frequency-domain algorithms: filtering, spectral analysis, modulation, beamforming.

On-chip memory plus 8 MB module-integrated Quad-SPI flash and 8 MB Octal-SPI PSRAM. Integrated Wi-Fi connectivity provides optional data streaming, control, and instrumentation. Espressif datasheet →

TLV320AIC3204 audio codec

Texas Instruments TLV320AIC3204 (AIC3204) is a flexible, low-power stereo audio codec with programmable inputs and outputs, PowerTune capabilities, and parameterizable signal-processing blocks.

TI datasheet →  ·  Application Reference Guide →

External memory

Support for external storage via a microSD card connector with push-push ejector.

ADC connection

An ADC input is accessible via a footprint for an optional potentiometer at reference designator R22. The potentiometer wiper (pin 2) connects to IO5 (ADC1_CH4) on the ESP32-S3 module, enabling simple signal-acquisition and control experiments.

Compatible part: Same Sky PT01-D130D-B503 →

Hardware interfaces.

Click any row to expand for details.

J1 Line In 3.5 mm stereo audio input

3.5 mm stereo audio input jack. Accepts single-ended line-level signals with a maximum AC signal swing of 0.75 Vpeak when the codec common-mode voltage is set to 0.75 V (or 0.9 Vpeak at CM = 0.9 V; CM is configurable via codec registers).

Input impedance is configurable from 15 kΩ to 79 kΩ depending on gain and routing. Each channel includes a 10 µF DC-blocking capacitor for a worst-case high-pass cutoff of approximately 1 Hz.

J2 Headphone 3.5 mm stereo output, 16 Ω capable

3.5 mm stereo headphone output jack. Single-ended output capable of driving 16 Ω headphones up to 0.5 VRMS at full-scale. 100 µF DC blocking capacitors give a high-pass cutoff near 100 Hz with a 16 Ω load.

J3 Line Out 3.5 mm stereo line-level output

3.5 mm stereo line-level output jack. Intended for connection to high-impedance loads (nominal 10 kΩ single-ended). Provides up to 0.375 VRMS at full-scale. 10 µF DC-blocking capacitors give a high-pass cutoff near 1.6 Hz with a 10 kΩ load.

J4 USB USB 2.0 Type-C, +5 V power

USB 2.0 Type-C receptacle for host PC connectivity and +5 V external power, used for board operation and battery charging.

J5 Codec Expansion 2×6 header · up to 4 extra mics

2×6, 2.54 mm pitch dual-row female header providing an auxiliary expansion interface for up to two additional audio codecs. Supports up to four additional microphones for linear-array and beamforming demos with synchronized multi-channel acquisition.

View pin-out table ↓

J6 GPIO Header Raspberry Pi-compatible 2×20 (40 pin)

2×20, 2.54 mm pitch dual-row female header compatible with standard Raspberry Pi mechanical layouts. Provides digital GPIO, power rails, and control signals for external hardware expansion and prototyping.

View pin-out table ↓

J7 Audio Header (unpopulated) 2×5 footprint, DC-coupled signal access

2×5, 2.54 mm pitch dual-row header footprint providing DC-coupled access to Line In, Line Out, Headphone, and Microphone Left/Right signals. Intended for advanced debugging, instrumentation, or external analog interfacing.

View pin-out table ↓

J8 Line Out Header 1×2 male header, L/R signals only

1×2, 2.54 mm pitch single-row male header connected to Line Out Left and Line Out Right (no ground pin). Pin 1, indicated with a dot on PCB silkscreen, connects to Line Out Left. Intended for connection to an external amplifier or downstream analog circuitry; reference ground is available on other connectors (e.g., J7 GND pins).

J9 External Battery and Charger JST-PH 2 mm pitch, 3.7 V Li-ion

2.0 mm pitch JST-PH-compatible vertical PCB male header for connection to an external 3.7 V lithium-ion battery pack. An integrated battery charger automatically charges the external battery when USB power is supplied. An on-board charge-status LED (D5) is lit when the battery is charging.

Example compatible battery: 2000 mAh JST-PH pack →

Pin assignments.

J6 - GPIO Header (40 pin)
PinSignalDirectionNotes
1--Not connected
2+5VPowerUSB-derived supply
3I2C_SDAI/OI2C data
4+5VPowerUSB-derived supply
5I2C_SCLI/OI2C clock
6GNDPowerGround
7EXT_GPIO_0I/OUser GPIO
8UART1_RXInputUART receive
9GNDPowerGround
10UART1_TXOutputUART transmit
11EXT_GPIO_1I/OUser GPIO
12PCM_CLKOutputAudio clock
13EXT_GPIO_2I/OUser GPIO
14GNDPowerGround
15EXT_GPIO_3I/OUser GPIO
16--Not connected
17EXT_GPIO_4I/OUser GPIO
18--Not connected
19EXT_SPI_MOSIOutputSPI MOSI
20GNDPowerGround
21EXT_SPI_MISOInputSPI MISO
22--Not connected
23EXT_SPI_SCKOutputSPI clock
24EXT_SPI_CS_0OutputSPI chip select
25--Not connected
26--Not connected
27ID_I2C_SDAI/OEEPROM SDA
28ID_I2C_SCLI/OEEPROM SCL
29--Not connected
30GNDPowerGround
31--Not connected
32--Not connected
33--Not connected
34GNDPowerGround
35PCM_FSOutputAudio frame sync
36--Not connected
37--Not connected
38PCM_DOUTOutputAudio data out
39GNDPowerGround
40PCM_DINInputAudio data in
J5 - Codec Expansion (12 pin)
PinSignalDirectionNotes
1+3.3VPowerRegulated +3.3V supply
2CODEC_1_CSOutputSPI chip select for Codec 1
3MCLKOutputMaster clock
4CODEC_2_CSOutputSPI chip select for Codec 2
5WCLKOutputAudio serial data bus word clock
6BCLKOutputAudio serial data bus bit clock
7CODEC_DOUTInputAudio serial data bus data output
8CODEC_DINOutputAudio serial data bus data input
9SPI_MOSIOutputSPI MOSI
10SPI_SCLKOutputSPI Clock
11SPI_MISOInputSPI MISO
12GNDPowerGround
J7 - Audio Header (10 pin)
PinSignalDirectionNotes
1LIRInputLine-in right
2LILInputLine-in left
3HPLOutputHeadphone left
4HPROutputHeadphone right
5LOROutputLine-out right
6LOLOutputLine-out left
7MIC_RInputMicrophone right
8MIC_LInputMicrophone left
9GNDPowerGround
10GNDPowerGround
  • This hardware is intended for educational and evaluation use only.
  • No regulatory certifications are implied.
  • Specifications are subject to change without notice.

RadioSonic™ is a trademark of SigPro Labs, LLC.

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